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www.irf.com IRAUDAMP9 rev 1.0 page 1 of 39 IRAUDAMP9 1.7 kw / 2- ? single channel class d audio power amplifier using the irs2092s and irfb4227 by israel serrano and jun honda caution: international rectifier recommends the following guidelines for safe operation and handling of IRAUDAMP9 demo board: ? always wear safety glasses when operating demo board ? avoid physical contact with exposed metal surfaces when operating the demo board ? turn off demo board when placing or removing measurement probes
www.irf.com IRAUDAMP9 rev 1.0 page 2 of 39 table of contents page introduction................................................................................................................... ............................ 3 specificat ions ................................................................................................................. ........................... 3 connection setup and description ............................................................................................... 5-6 test proc edures ................................................................................................................ ...................... 6 performance and test g raphs .................................................................................................... ... 7-9 IRAUDAMP9 overview ............................................................................................................. ................. 10 functional d escript ions........................................................................................................ ........... 100 c lass d o peration ............................................................................................................................... .... 100 gate driver buffer stage?????????????????????????????????? 11 p ower s upplies and psrr........................................................................................................................ 12 b us p umping ............................................................................................................................... ................ 12 h ouse k eeping p ower s upply ................................................................................................................... 13 i nput ............................................................................................................................... ............................. 13 o utput ............................................................................................................................... ......................... 13 h igh o utput p eak s hutdown (hops) c ircuit ......................................................................................... 13 g ain s etting / v olume c ontrol ................................................................................................................ 14 e fficiency ............................................................................................................................... .................... 14 o utput f ilter d esign and p reamplifier ................................................................................................... 15 s elf -o scillating pwm m odulator .......................................................................................................... 16 a djustments of s elf -o scillating f requency ......................................................................................... 16 s witches and i ndicators ........................................................................................................................... 16 s tartup and s hutdown ............................................................................................................................. 17 s tartup and s hutdown s equencing ........................................................................................................ 17 p rotection s ystem o verview ................................................................................................................... 20 ouput over-current protection (ocp)............................................................................................ ........ 20 low-side current sensing ................................................................................................. ................ 20 high-side current sensing ................................................................................................ ................ 21 input bus over-volta ge protecti on (ovp) ........................................................................................ ...... 21 input bus under-volt age protecti on (uvp)....................................................................................... ...... 22 speaker dc-offset- protection (dcp) ............................................................................................ ........ 21 offset null (dc o ffset) adjustment ............................................................................................. ............ 21 over-temperature pr otection (otp) .............................................................................................. ........ 22 thermal cons iderations ......................................................................................................... ................. 22 s hort c ircuit p rotection r esponse ....................................................................................................... 23 s chematic d iagrams ............................................................................................................................... ... 25 IRAUDAMP9 fabrication bill of material s (bom)....................................................................... 30 IRAUDAMP9 pcb specifications................................................................................................... ........ 34 revision chang es descri ptions.................................................................................................. ...... 39
www.irf.com IRAUDAMP9 rev 1.0 page 3 of 39 introduction the IRAUDAMP9 reference design is a single-channel 1.7-kw ( @ 2 ? load) half-bridge class d audio power amplifier. this reference design demonstrates how to use the irs2092s class d audio controller and external gate buffer , to implement protection circuits, and design an optimum pcb layout using the irfb4227 (x 2 pairs) to-220 mosfets. this referenc e design may require additional heatsink or fan for normal operation (one-eighth of continuous rated powe r). the reference design provides all the required housekeeping power supplies for ease of use. the 1-ch annel design is capable of delivering higher than its rated power with provision of larger heat sink ( rth <2 c / w). applications ? pro-audio amplifiers ? powered speakers ? active sub-woofers ? p.a. systems ? car audio amplifiers musical instrument amplifier features output power: 1.7 kw single channel (2 ? load, 1khz, thd+n=10%), residual noise: 290 v, ihf-a weighted, aes-17 filter distortion: 0.07% thd+n @ 600w, 2 ? efficiency: 97% @ 1.7 kw, 2 ? multiple protection features: output over-cur rent protection (ocp), high side and low side input over-voltage protection (ovp), input under-voltage protection (uvp), output dc-offset protection (dcp), over-temperature protection (otp) pwm modulator: self-oscillating half-bridge topology with optional clock synchronization specifications general test conditions (unless othe rwise noted) notes / conditions supply voltages 75v load impedance 2 ? self-oscillating frequency 300kh z no input signal, adjustable gain setting 33db 1vrms input yields 1-kw sinusoidal output power electrical data typical notes / conditions ir devices used irs2092s audio controller and gate-driver, irfb4227 (x 2 pairs) to-220 mosfets modulator self-oscillating, second order sigma-delta modulation, analog input power supply range 48v to 80v bipolar power supply output power ch1: (1% thd+n) 1200w 1khz sinewave output power ch1: (10% thd+n) 1700w 1khz sinewave rated load impedance 2 ? non-inductive resistive load idling supply current +67ma , -105ma no input signal total idle power consumption 13.2 w no input signal system efficiency 97% 94% 74 % @ +/- 75v 1.7 kw, 2 ? @ +/- 75v 1.2 kw, 2 ? @ +/- 75v 125 w (1/8 po-rated), 2 ?
www.irf.com IRAUDAMP9 rev 1.0 page 4 of 39 audio performance class d output notes / conditions thd+n, @ 1w thd+n, @ 125w thd+n, @ 250w thd+n, @ 500w thd+n, @ 1250w thd+n, @ 1700w 0.024% 0.025% 0.025% 0.049% 1.0 % 10.0% 1khz, +/-75vbus, 2-ohm load dynamic range 99.4 db a-weighted, aes-17 filter, single-channel operation residual noise, 22hz - 20khz aes17 290 v self-oscillating ? 300khz ap bw:<10hz- 20khz aes17 ihf-a weighted damping factor 81.9 1khz, relative to 2 ? load frequency response : 20hz-20khz 1db 1w, 2 ? load thermal performance typical notes / conditions idling t c = 56 c no signal input, t a =25 c, after 5 min 125w (1/8 rated power) t c = 104 c continuous @ t a =25 c *requires larger heatsink design for continuous operation 1.2 kw t c = 118 c at otp shutdown after 130 sec, t a =25 c physical specifications dimensions 7.76?(l) x 5.86?(w) x 2.2?(h) 192 mm (l) x 149mm (w) x 56mm(h) weight 0.54kgm
www.irf.com IRAUDAMP9 rev 1.0 page 5 of 39 connection setup figure 1 typical test setup volume r130 j7 j1 j3 r100 s1 s2 ch1 output ch1 input g vs pins (ch1-o) normal protection s3 75v, 18adc supply 2-ohm 75v,18a dc supply j6 audio signal generator j8 3000w,non-inductive resistors
www.irf.com IRAUDAMP9 rev 1.0 page 6 of 39 connector description ch1 in j7 analog input for ch1 power j3 positive and negative supply (+b / -b) ch1 out j1 output for ch1 ext clk j6 external clock sync dcp out j8 dc protection relay output test procedures test setup: 1. connect 2 - 3000 w dummy loads to the output connectors (j1 as shown on figure 1). 2. connect the audio precision analyzer (ap) signal generator output to j7. 3. initially set the voltages of the dual power supplies to 75v with current limits to 0.5 a. 4. make sure to turn off the dual power supplies before connecting to the unit under test (uut). 5. set switch s1 to middle position (self oscillating). 6. set volume level knob r130 fully counter-clockwise (minimum volume). 7. connect the dual power supply to j3 as shown in figure 1. power up: 8. turn on the dual power supply. the b supplies must be applied and removed at the same time. 9. red led (protection) should turn on almost immediately and turn off after about 3s. 10. green led (normal) then turns on after the red led is extinguished and should stay on. 11. note the quiescent current for the positive supply should be 67ma 10ma at +75v. 12. quiescent current for the negative supply should be 105ma 15ma at ?75v. 13. push switch s3 (trip and reset push-button) to restart the leds sequence, which should be the same as noted above in steps 9 and 10. switching frequency test 14. monitor switching waveform at vs1/j4 (pins 9-12) of ch1 on daughter board using an oscilloscope. 15. for IRAUDAMP9, the self-oscillating switching frequency is pre-calibrated to 300 khz. to modify the IRAUDAMP9 frequency, adjust the potentiometer p1 for ch1.
www.irf.com IRAUDAMP9 rev 1.0 page 7 of 39 audio functional te sts: 16. set the current limit of the dual power supplies to ~18a. make sure the volume control potentiometer is turned to full counterclockwise position. apply 1v rms @ 1 khz from the audio signal generator to the audio input connector j7. 17. turn control volume, r130 clock-wise to obtain an output reading of 1.0 kw. for all the subsequent tests as shown on the audio precision graphs below, measurements are taken across j1 with an aes-17 filter. observe that a 1 v rms input generates an output voltage of ~44.8 v rms . alternatively, a 100-mvrms input would give an output of ~ 10.03w that corresponds to 4.48vrms across a 2-ohm load. 18. using an oscilloscope monitor the output signals at j1 while sweeping the audio input signal from 10 mv rms to 2 v rms . the waveform must be a non distorted sinusoidal signal. test setup using audio precision analyzer (ap): 19. use an unbalanced-floating signal from the generator outputs. 20. use balanced inputs taken across output terminal j1. 21. connect ap chasis ground to gnd at terminal j7. 22. select the aes-17 filter (pull-down menu) for all the testing except frequency response. 23. use input signal ranging from 15 mv rms to 1 v rms . 24. run ap test programs for all subsequent tests as shown in figure 2 below. performance and test graphs b supply = 75v, 2 ? load figure 2 thd+n vs. power
www.irf.com IRAUDAMP9 rev 1.0 page 8 of 39 figure 3 frequency response figure 4 thd+n vs. frequency at 10w and 125w 2-ohm 4-ohm
www.irf.com IRAUDAMP9 rev 1.0 page 9 of 39 . figure 6. 1 - v rms output frequency spectrum no signal, self oscillator @ 300khz figure 5 noise floor
www.irf.com IRAUDAMP9 rev 1.0 page 10 of 39 IRAUDAMP9 overview the IRAUDAMP9 features a single-channel self-osc illating pwm modulator. this topology results in the lowest component count, highest performance and robust design. it represents an analog version of a second-order sigma-delta modulation having a class d switching stage inside the loop. the benefit of the sigma-delta modulation, in comparison to the carrier-signal based modulation, is that all the error in the audible frequency range is shifted to the inaudible upper- frequency range by nature of its operation. also, sigma-delta modulation allows a designer to apply a sufficient amount of error correction. the IRAUDAMP9 self-oscillating topology inco rporates the following functional blocks. ? front-end integrator ? pw modulator and level shifters ? gate driver and buffer ? power mosfets ? output lpf + - agnd . . agnd agnd gndd agnd ri n in- agnd comp . rfb fi l t er rss agnd -vss agnd +vaa irs2092s lo vs vcc cbs dbs vb gndd 0v 0v agnd ccomp rfreq raa vcc cap ho cout r-fb cs s integrator com modulator and shift level gnd 0v 0v lp filter l- ou t caa +b +vcc -b input q3a irfb4227 q2 pnp q2n npn rgat e cfb filter pf q4a irfb4227 q1p pnp q1n npn rgat e c1integrator pf c2integrator nf hi-side buffer lo-side buffer q3b irfb4227 q4b irfb4227 rgat e rgat e green red leds reset trip ovp / uvp (to-220 case temp.) otp dcp d csd vo vs heatsink hops fig. 7 functional block diagram functional description class-d operation the c2 integrator , c 1integrator , r21 + potentiometer p1 form a front-end second-order integrator. this integrator receives a rectangular feedback signal from the class d switching stage and outputs a quadratic oscillatory waveform as a carrier si gnal. to create the modulated pwm signal, the input
www.irf.com IRAUDAMP9 rev 1.0 page 11 of 39 signal shifts the average value of this quadratic waveform (through gain relationship between r52 / r46 ratio) so that the duty varies according to the instantaneous value of the analog input signal. the irs2092s input comparator processes the signal to create the required pwm signal. this pwm signal is internally level-shifted down to the negative supply rail where it is split into two signals, with opposite polarity and added dead time, for high-side and low-side mosfet gate signals, respectively. the irs2092s drives 2 pai rs of irfb4227 to-220 mosfets in the power stage to provide the amplified pwm waveform. the amplified analog output is re-created by demodulating the amplified pwm. this is done by means of the lc low-pass filter (lpf) formed by l4 and c34, which filters out the switching carrier signal. gate driver buffer stage high power designs such as IRAUDAMP9 that use multiple mosfets in parallel connection to handle large amount of switching current often require far more than +/-1a drive current even for a brief moment due to mosfets? gate drive requirement (high total gate charge, qg). in order to facilitate this high drive current, a buffer stage is devised to source and sink this high gate charge. this stage consists of npn-pnp bjt transistors in totem pole configuration. it serves as a high- speed buffer amplifier that receives input from ir s2092s ho / lo to drive the power mosfet stage through rg (1a,1b,2a,2b) for low side mosfets q4(a,b) and for high-side q3 (a,b) mosfets. theoretically, the switching time is reduced by su ch amount (hfe) as compared to that high-qg design that uses the divided output current capacity of the driver ic. this buffering action is very necessary to speed-up the switching times of each mosfets in order not to exceed the ocp voltage monitor time. the ic commences drain-to-source voltage monitoring as soon as the ho / lo go to high state but after the leading edge blanking time. +b czobel rzobel -b q3a q4a q3b q4b q1p q2p q1n q2n cvcc2 cvcc1 vb rg2a rgs4a rg2b rgs4b rg1a rg1b rgs3a rgs3b c bus filter ho lo r load c out filter l out filter vs gnd -b vout vcc fig. 8 simplified diagram for gate-buffering of 2 x irfb4227 mosfets bjt buffer low side bjt buffer hi-side
www.irf.com IRAUDAMP9 rev 1.0 page 12 of 39 power supplies the IRAUDAMP9 has all the necessary housekeeping power supplies onboard and only requires a pair of symmetric power supplies ranging from 38 v to 82 v (+b, gnd, -b) for operation. the internally-generated housekeeping power supplies include a 5 v supply for analog signal processing (preamp, etc.), and a +12 v supply (vcc), referenced to ?b, to supply the class d gate-driver stage. for the externally-applied power, a regulated power supply is preferable for performance measurements, but not always necessary. the bus capacitors, c45 ~ c48 on the motherboard, along with high-frequency bypass-capacitors c19 ~ c26 on daughter board, address the high- frequency ripple current that result from switchi ng action. in designs involving unregulated power supplies, the designer should place a set of bus capacitors, having enough capacitance to handle the audio-ripple current, externally. overall regulation and output voltage ripple for the power supply design are not critical when using the ir audamp9 class d amplifier as the power supply rejection ratio (psrr) of the IRAUDAMP9 is excellent as shown in figure 9 below. fig. 9 IRAUDAMP9 power s upply rejection ratio (psrr) bus pumping since the IRAUDAMP9 is a half-bridge configuration, bus pumping does occur. under normal operation during the first half of the cycle, energy flows from one supply through the load and into the other supply, thus causing a voltage imbalance by pumping up the bus voltage of the receiving power supply. in the second half of the cycle, this condition is reversed, resulting in bus pumping of the other supply. the following conditions worsen bus pumping: ? lower frequencies (bus-pumping duration is longer per half cycle) ? higher power output voltage and/or lower load impedance (more energy transfers between supplies) ? smaller bus capacitors (the same energy will cause a larger voltage increase) -75vbus
www.irf.com IRAUDAMP9 rev 1.0 page 13 of 39 the IRAUDAMP9 has protection features that will shutdown the switching operation if the bus voltage becomes too high (>82 v) or too low (<38 v). one brute countermeasure is to put a large electrolytic-capacitors between the power supply and the input terminals. bus voltage detection is only done on the ?b supply as the effect of the bus pumping on the supplies is assumed to be symmetrical in amplitude (although opposite in phase). house keeping power supplies the internally-generated power supplies include 5v for analog signal processing, and +12v supply (vcc) referred to the negative supply rail -b for to-220 gate drive. the gate driver section of the irs2092s uses vcc to drive gates of the to-220s. vcc is referenced to ?b (negative power supply). the d6, r26 and c5 form a bootstrap floating supply for the ho gate driver. input input signal is an analog signal ranging from 20hz to 20khz with up to 2 v rms amplitude with a source impedance of no more than 600 ? . input signal with frequencies around 20khz may cause lc resonance in the output lpf and may result to a large reactive current flow through the switching stage, especially if the amplifier is not connected to any load - this can activate oc protection. output the IRAUDAMP9 has single output and therefore hav e terminals labeled (+) and (-) with the (-) terminal connected to power ground. each channel is optimized for a 2 ? speaker load for a rated output power of 1200 w @ 1% thd+n. high output peak shutdown (hops) circuit it is common in amplifier design to have a rc s nubber called zobel network that is used to damp the resonance and prevent peaking frequency response with high load impedance. instead, the IRAUDAMP9 has a simple detection circuit in plac ed, which consist of a npn transistor, blocking diode and a current limiting resistor to detect the output peak status from exceeding ?b supply during resonance of the output lc filter. this circuit pulls the cstart capacitor (c66) down to output (+) that sends a signal to irs2092s to inhibit the power stage from switching. as the output returns to unclipped level, the base-to-emitter voltage is reduced and releases the csd cap to start charging. this would allow the irs2092s to resume driving operation of the power stage. figure 10 output low pass filter
www.irf.com IRAUDAMP9 rev 1.0 page 14 of 39 the hops function is not expected to be triggered in normal operating conditions. it is use to halt the output going too negative ( < -b rail) during the natural resonance of output lc filter. the hops circuit is intended for higher than nominal impedance or open load conditions. fig. 11 shutdown circuit diagram when output goes lower than negative rail. gain setting / volume control the IRAUDAMP9 has an internal volume control (potentiometer r130 labeled, ?volume?) for gain adjustment. gain setting is tracked and controlled by the volume control ic (u_2) setting the gain from the microcontroller ic (u_3). the total gain is a product of the power-stage gain, which is constant (+33 db), and the input-stage gain that is directly-controlled by the volume adjustment. the volume range is about 100 db with minimum volume setting to mute the system with an overall gain of less than -60 db. for best performance in testing, the internal volume control should be set to 1 vrms which results in rated output power (1 kw into 2 ). efficiency figure 12 shows efficiency characteristics of t he IRAUDAMP9. the high efficiency is achieved by the following major factors: 1) low conduction loss due to the low r ds(on) of the irfb4227 mosfets 2) low switching loss due to the high gate drive output for fast rise and fall times 3) secure dead-time provided by t he irs2092s, avoiding cross-conduction
www.irf.com IRAUDAMP9 rev 1.0 page 15 of 39 IRAUDAMP9 w/ 2-pair of irfb4227 @ +/-75vdc 2-ohm r load 0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100% 0 100 200 300 400 500 600 700 800 900 1000 1100 1200 1300 1400 1500 1600 total output power (w) efficiency (%) total system efficiency fig.12 efficiency plots. output filter and preamplifier output filter: the amplified pwm output is reconstructed back to an analog signal by the output lc lpf. this lpf is formed by l4 and c34, provides pass band for the audio frequencies while filtering out the switching carrier signal. a single stage output filter can be used with switching frequencies of around 300 khz ; a design with a lower switching frequency may require an additional stage of filtering. since the output filter is not included in the control loop of the IRAUDAMP9, the reference design cannot compensate for performance deterioration due to the output filter. therefore, it is important to select filter components with the following characteristics in mind. 1) the dc resistance of the inductor should be minimized to 6 m or less. 2) the linearity of the output inductor and capacitor should be high with respect to load current and voltage.
www.irf.com IRAUDAMP9 rev 1.0 page 16 of 39 preamplifier the preamp allows partial gain of the input signal. it is possible to evaluate the performance without the preamp and volume control, by removing r154 and feeding the input signal directly through r46 resistors (in-1). this effectively bypasses the preamp and connects the rca inputs directly to the class d power stage input. improving the preamp noise performance and the output filter, will improve the over all system performance approaching that of the stand-alone class d power stage. self-oscillating pwm modulator the IRAUDAMP9 features a self-oscillating type pwm modulator for the lowest component count and robust design. this topology represents an analog version of a second-order sigma-delta modulation having a class d switching stage inside the loop. the benefit of the sigma-delta modulation, in comparison to the carrier-signal based modulation, is that all the error in the audible frequency range is shifted to the inaudible upper-frequency range by nature of its operation. also, sigma-delta modulation allows a designer to apply a sufficient amount of correction. the self-oscillating frequency is determined by the total delay time inside the control loop of the system. the delay of the logic circuits, propagat ion delay of irs2092s gate-driver, delay caused by the external buffer, irfb4227 (x 2 pairs) switching speed, time-constant of front-end integrator and variations in the supply voltages are critical factors of the self-oscillating frequency. under normal conditions, the switching-frequency is around 300 khz with no audio input signal and a +/-75 v supply. adjustments of self-oscillating frequency the pwm switching frequency in this type of self -oscillating switching schem e greatly impacts the audio performance, both in absolute frequency and frequency relative to the other channels. in absolute terms, at higher frequencies, distortion due to switching-time becomes significant, while at lower frequencies, the bandwidth of the amplifier suffers. most importantly, higher switching frequency results in higher switching loss of the power stage, hence the thermal performance degrades, especially with those that having a limited-size heatsink design. potentiometers for adjustin g self-oscillating frequency p1 potentiometer + r21 switching frequency for ch1* *adjustments have to be done in idle condition with no input signal. switches and indicators there are two different indicators on the reference design: ? a red led, signifying a fault / shutdown condition when lit. ? a green led on the motherboard, signifying conditions are normal and no fault condition is present. there are three switches on the reference design: switch s1 is an oscillator selector. this three-position switch is selectable for internal self- oscillator (middle position ? ?self?), or either internal (?int?) or external (?ext?) clock synchronization.
www.irf.com IRAUDAMP9 rev 1.0 page 17 of 39 ? switch s3 is a trip and reset push-button. pushing this button has the same effect of a fault condition. the circuit will restart about three seconds after the shutdown button is released. startup and shutdown one of the most important aspects of any audio amplifier is the startup and shutdown procedures. typically, transients occurring during these intervals can result in audible pop- or click-noise on the output speaker. traditionally, these transients have been kept away from the speaker through the use of a series relay that connects the speaker to the audio amplifier only after the startup transients have passed and disconnects the speaker prior to shutting down the amplifier. it is interesting to note that the audible noise of the relay opening and closing is not considered ?click noise?, although in some cases, it can be louder than the click noise of non-relay-based solutions. the IRAUDAMP9 does not use any series relay to disconnect the speaker from the audible transient noise, but rather depends on irs2092s?s on-chip noise reduction circuit that yields audible noise levels that are far less than those generated by the relays they replace. this results in a more reliable, superior performance system. startup and shutdown sequencing the IRAUDAMP9 sequencing is achieved through the charging and discharging of the c start capacitor c66. this, coupled to the charging and discharging of the voltage of csd (c10 on daughter board for ch1) of the irs2092s, is all that is required for complete sequencing. the conceptual startup and shutdown timing diagrams are show in figure 13. figure 13, conceptual startup sequencing of power supplies and audio section timing for startup sequencing, +/-b supplies startup at different intervals. as +/-b supplies reach +5 v (vaa) and -5 v (vss) respectively, the analog supplies (vaa, vss) start charging and, once +b class d startup music startup v cc -b +b +5 v -5 v cstart csd uvp@-38 v csd= 2/3v dd c start ref2 c start ref1 a udio mute ch1_o time
www.irf.com IRAUDAMP9 rev 1.0 page 18 of 39 reaches ~16 v, vcc charges. once ?b reaches -38 v, the uvp is released and csd and c start start charging. as csd reaches two-thirds v aa , the class d stage starts oscillating. the class d amplifier is now operational, but the preamp output remains muted until c start reaches ref2. at this point, normal operation begins. the entire process takes less than three seconds. figure 14. conceptual shutdown sequencing of power supplies and audio section timing. shutdown sequencing is initiated once uvp is activated. as long as the supplies do not discharge too quickly, the shutdown sequence can be completed before the irs2092s trips uvp. once uvp is activated, csd and c start are discharged at different rates. in this case, threshold ref2 is reached first and the preamp audio output is muted. once c start reaches threshold ref1, the click- noise reduction circuit is activated. it is then possible to shutdown the class d stage (csd reaches two-thirds v dd ). this process takes less than 200 ms. for any external fault condition (otp, ovp, uvp or dcp ? see ?protection?) that does not lead to power supply shutdown, the system will trip in a similar manner as described above. once the fault is cleared, the system will reset (similar sequence as startup). v cc -b +b +5 v -5 v cstart csd uvp@-38 v csd= 2/3v dd cstart ref1 cstart ref2 a udio mute ch1_o class d shutdown time music shutdown
www.irf.com IRAUDAMP9 rev 1.0 page 19 of 39 figure 15. conceptual click noise re duction sequencing at trip and reset cstart csd external trip csd= 2/3vdd cstart ref1 cstart ref2 ch1_o a udio mute class d shutdown time music shutdown class d startup music startup cstart ref1 cstart ref2 reset
www.irf.com IRAUDAMP9 rev 1.0 page 20 of 39 protection system overview the irs2092s integrates over current protection (ocp) inside the ic. the rest of the protections, such as over-voltage protection (ovp), under-v oltage protection (uvp), and over temperature protection (otp), are detected externally to the irs2092s. . d4 ocref ocref 5.1v csd trip reset ocset + . uvp / ovp lo vs vcc vb csh r41 to-220 (case temp.) otp r25 bav19 d1 dcp green yellow leds r17 ho ocset com csd r43 1.2v r19 . gndd 0v cout 0v lp filter l-out +b -b q3a irfb4227 q2 pnp q2n npn rgat e q4a irfb4227 q1p pnp q1n npn rgat e lo-side buffer q3b irfb4227 q4b irfb4227 rgat e rgat e vo vs heatsink irs2092s hi-side buffer hops figure 16. functional block diagram of protection circuit implementation the external shutdown circuit will disable the output by pulling down csd pins . if the fault condition persists, the protection circuit stays in shutdown until the fault is removed. over-current protection (ocp) the ocp internal to the irs2092s shuts down the ic if an ocp is sensed in either of the output mosfets. for a complete description of the ocp circuitry, please refer to the application note an1138. here is a brief description: low-side current sensing the low-side current sensing feature protects the low side mosfet from an overload condition from negative load current by measuring drain-to-source voltage across r ds(on) during its on state. ocp shuts down the switching operation if the drain-to-source voltage exceeds a preset trip level. an external resistive divider r17 and r19 on the daughter board are used to program the low - side ocp trip point.
www.irf.com IRAUDAMP9 rev 1.0 page 21 of 39 the voltage setting on the ocset pin programs the threshold for low-side over-current sensing. when the vs voltage becomes higher than the ocset voltage during low-side conduction, the irs2092s turns the outputs off and pulls csd down to -vss. high-side current sensing the high-side current sensing protects the high side mosfet from an overload condition from positive load current by measuring drain-to-source voltage across r ds(on) during its on state. ocp shuts down the switching operation if the drain-to-source voltage exceeds a preset trip level. high-side over-current sensing monitors drain-to-source voltage of the high-side mosfet during the on state through the csh and vs pins. the csh pin detects the drain voltage with reference to the vs pin, which is the source of the high-side mosfet. in contrast to the low-side current sensing, the threshold of the csh pin to trigger oc protection is internally fixed at 1.2v. an external resistive divider, r41 and r43 are used to program a hi-side ocp trip point. an external reverse blocking diode d8 is required to block high voltage feeding into the csh pin during low- side conduction. by subtracting a forward voltage drop of 0.6v at d1, the minimum threshold which can be set for the high-side is 0.6v across the drain-to-source. input bus over-voltage protection (ovp) ovp is provided externally to the irs2092s. o vp shuts down the amplifier if the bus voltage between gnd and -b exceeds 82v. the threshold is determined by a zener diode z9. ovp protects the board from harmful excessive supply voltages, such as due to bus pumping at very low frequency-continuous output in stereo mode. input bus under-voltage protection (uvp) uvp is provided externally to the irs2092s. u vp prevents unwanted audible noise output from unstable pwm operation during power up and down. uvp shuts down the amplifier if the bus voltage between gnd and -b falls below a voltage set by zener diode z8. speaker dc-offset protection (dcp) dcp protects speakers against dc output current feeding to its voice coil. dc offset detection detects abnormal dc offset and shuts down pwm. if this abnormal condition is caused by a mosfet failure because one of the high-side or low-side mosfets short circuited and remained in the on state, the power supply needs to be cut off in order to protect the speakers. output dc offset greater than 2.1v triggers dcp. offset null (dc offset) adjustment the IRAUDAMP9 is designed such that no output-offset nullification is required. dc offsets are tested to be less than 50 mv.
www.irf.com IRAUDAMP9 rev 1.0 page 22 of 39 over-temperature protection (otp) an external ntc resistor is placed in clos e proximity to the low-side q5a irfb4227 to-220 mosfet. if the thermistor temperature rises above 100 c, the otp is activated. the otp protection will shut down switching by pulling the csd pin low and will recover once the temperature at the ntc has dropped sufficiently. this temperature protection limit yields a pcb temperature at the mosfet of about 100 c. this setting is limited by the pcb material and not by the operating range of the mosfet. thermal considerations due to limited heat sink size, the IRAUDAMP9 is designed for high efficiency to deliver 1 kw rated power for 1 minute at open-air room temperature ( starting w/ tamb: ~22 - 25c) however, the IRAUDAMP9 requires larger heatsink design to handle one-eighth of the continuous rated power, which is generally considered to be a normal operating condition for safety standards. if the user decides to increase the size of the heatsink or have a minimum forced air- cooling, the daughter board can handle continuous rated power. figure 17. thermal image of the heatsink asse mbly during 1/8 rated power burn-in test.
www.irf.com IRAUDAMP9 rev 1.0 page 23 of 39 short circuit protection response figures 18-19 show over current protection reaction time of the IRAUDAMP9 in a short circuit event. as soon as the irs2092s detects an over current condition, it shuts down pwm. after one second, the irs2092s tries to resume the pwm. if the short circuit persists, the irs2092s repeats try and fail sequences until the short circuit is removed. figure 18. positive-side ocp waveforms during short circuit test at 10w load condition. vs pin vs p in load current csd load p in current vs pin
www.irf.com IRAUDAMP9 rev 1.0 page 24 of 39 figure 19 negative-side ocp waveforms duri ng short circuit test at clipping condition.
www.irf.com IRAUDAMP9 rev 1.0 page 25 of 39 +b -b vcc -5v +5v power gnd gnd sync u_amp9_sync_ps amp9_sync_ps rev1.0.sch inleft ch1 o sd +b -b -5v +5v power gnd gnd sync u_amp9_prot_vol amp9_prot_vol rev1.0.sch sd ch1 o inleft +b -b vcc +5v power gnd gnd -5v u_amp9_pwm_ch1 only amp9_pwm_ch1 only rev1.0.sch figure 20 system connection diagram schematic dia g rams
www.irf.com IRAUDAMP9 rev 1.0 page 26 of 39 inleft inright protection1 ch1 o ch2 o normal1 s3 sw-pb 1 2 3 6 5 4 p1 n/a 1 2 j8 n/a +b -b sd d20 1n4148 r89 4.7k z7 18v z8 36v r91 100k +5v r85 68k +5v r103 82k 1a 1y 2a 2y 3a 3y gnd vcc 6a 6y 5a 5y 4a 4y u_1 74hc14 +5v i e s sw s1a sw-3way_a-b clk2 i e s sw s1b sw-3way_a-b ext. clk j6 bnc r98 100r r99 10k r81 33k r104 1k trip and restart r110 5.76k -b r84 10k z9 82v dc prot ect ion ovp dcp +b uvp ot cst art +b -b -5v +5v power gnd gnd +b -b -5v +5v t o s sw s2a sw-3way_a-b c70 100pf, 50v r100 5k pot sync clk1 dcp r95 47k q8 mmbt5551 oe gnd vdd out u14 csx750p +5v 1clk 1clr 1qa 1qb 1qc 1qd gnd vcc 2clk 2clr 2qa 2qb 2qc 2qd u13 sn74lv393a r94 100r r82 47r mute c62 0.1uf, 16v q9 mmbt5551 q12 mmbt5551 q14 mmbt5551 q10 mmbt5401 q13 mmbt5401 r87 100k r92 10k r96 47k c67 0.1uf, 100v r86 47k r97 68k r111 47k r123 47k d19 1n4148 d21 1n4148 r90 100r c66 100uf, 16v c65 10uf, 16v c69 10uf, 16v c64 10uf, 16v r80 100r c63 0.1uf, 16v c68 0.1uf, 16v r88 47r r101 47r r107 47r r102 330r r106 1k r129 47k r105 47k r117 100k r112 100k r116 100k r119 100k r118 100k r113 5.76k r120 5.76k r126 5.76k r124 5.76k r127 5.76k r108 100k c71 330uf, 16v r121 1k vss 8 vr0 7 vr1 6 clk 5 vdd 1 cs 2 sdata 3 simul 4 u_2 3310ir02 r130 ct2265 c80 10nf, 50v cs sdatai sclk cs sdatai sclk j7 1418-nd r114 100r j9 1418-nd r128 0r0 zce n cs sdatai vd + dgrd sclk sdatao mute ainl agndr aoutl va- va+ aoutr agndl ainr u_3 cs3310 r131 100r r132 100k c77 10uf, 50v c75 10uf, 50v r109 100k r133 47r r134 47r r115 10r r135 47r c1 10uf, 50v cs sdatai sclk gnd -5v +5v +5v -5v +5v cs sdatai mute +5v r153 0r0 c79 10uf, 16v c78 0.1uf, 16v r156 open r157 open ch2 ch1 u n s t u f f f o r a m p 9 r122 0r0 trip-restart figure 21 mother board schematic diagram housekeeping protection and volume control circuit
www.irf.com IRAUDAMP9 rev 1.0 page 27 of 39 r40 3.3k l4 22uh r38 100k r58 200k c37 open c32 150pf ch1 out ch1 in ch2 o -b 6 +b 15 +b 16 -b 7 ch1 o 9 ch2 o 1 ch2 o 2 ch1 o 10 -b 5 ch2o 3 ch2 o 4 -b 8 ch1 o 11 ch1 o 12 +b 14 +b 13 j4 c33 10uf, 50v ch1 o 1 2 3 j3 277-1272 -b +b ch1 o inleft +b -b vcc +5v power gnd gnd +b -b vcc +5v r39 1k r43 2.2k 1 2 j1 277-1022 c46 1200uf, 100v r59 200k -5v -5v c34 2.2uf, 275v d23 rs1db signal gnd1 3 vss 2 pwm1 1 signal gnd1 5 signal gnd1 4 nc 6 j2 pwm2 12 va a 10 sd 11 signal gnd2 8 vcc 7 signal gnd2 9 j10 -b r154 1k c72 2.2nf r152 0 r sd vcc vss fo r amp 9 vaa for amp9 in1 for amp9 +5v -5v in1 for amp9 vss fo r a mp 9 -5v c45 1200uf, 100v c47 1200uf, 100v c48 1200uf, 100v q9a mmbt5 5 5 1 -b d5a r45a 47k trip-restart high output peak shutdown (hops) ckt. inleft_1 figure 22 mother board schematic diagram input / output power connection
www.irf.com IRAUDAMP9 rev 1.0 page 28 of 39 c21 0.0068uf, 50v +b r17 18.7k r15 4.7k 1% r18 1.00k 1% d2 b180 -b vcc +b -b r1 10r vcc r3 10k -5v b c e q1 fzt8 5 5ta z2 56v +5v power gnd gnd +b -b vcc -5v -b z1 15v q2 mmbta9 2 +b +5v +5v sync sync bst pre sw is pgnd out ss agnd ramp rt fb comp sync vi n sd vcc u3 lm5574 c9 0.022uf, 50v c18 0.0022uf, 100v c14 0.0082uf, 50v r8 47r sync3 sync2 sync1 sd3 sd3 z4 5v d3 b1100 r5 10k r2 10k r7 10k l2 470uh d4 b180 c11 0.022uf, 50v c25 0.022uf, 50v r29 47r r12 47r c13 0.470uf, 16v c22 0.0022uf, 100v c19 0.0082uf, 50v c28 0.0082uf, 50v r19 20.5k r36 1.00k 1% r14 10r c20 330pf, 100v b c e q18 pzt2222a z1 0 5.6v r6 20k q20 pzt2907at1 -b r13 1.00k c3 4.7uf, 100v c4 1uf, 100v c16 4.7uf, 50v c86 4.7uf, 100v r146 47.5k bst pre sw is pgnd out ss agnd ramp rt fb comp sync vi n sd vcc u4 lm5574 c23 4.7uf, 100v c24 1uf, 100v c26 0.470uf, 16v r32 18.7k c30 0.0068uf, 50v r145 47.5k r37 20.5k c31 0.0022uf, 100v r31 4.7k 1% c27 4.7uf, 50v c85 4.7uf, 100v r30 10r c29 330pf, 100v z1 2 5.6v r142 20k c6 4.7uf, 100v c7 1uf, 100v z3 56v b c e q3 fzt8 5 5ta c10 0.470uf, 16v r144 47.5k r11 18.7k c17 0.0068uf, 50v r16 20.5k d1 b180 r9 10r c15 330pf, 100v l3 470uh l1 470uh r10 8.66k c12 4.7uf, 50v c84 4.7uf, 100v bst pre sw is pgnd out ss agnd ramp rt fb comp sync vi n sd vcc u2 lm5574 r4 10r r147 10r r149 10r r150 4.7r c2 10uf, 16v c82 10uf, 16v c83 10uf, 16v -vout_ps -5v 12v 7v -7v r141 0r0 +b r148 0r0 r151 0r0 c35 10uf, 16v fo r amp9 fo r amp9 fo r amp9 fo r amp9 figure 23 mother board schematic diagram : dcdc converter for vaa , vss vcc bias p ower su pp lies
www.irf.com IRAUDAMP9 rev 1.0 page 29 of 39 d4 r1 100r r7 10r r19 8.2k r13 3.3k r17 2.2k d6 r9 10r r30 0r r32 0r r5 open r41 5.6k r43 3.6k r25 10k c18 3.3uf r40 33k +b vcc r12 4.7k r3 10r d1 vss vaa gnd1 10uf c10 r21 470 c23 1nf c21 1nf ch1- input r26 4.7r c35 0.1uf r35 1r r52 75k r50 75k lo 11 vs 13 ho 14 vcc 12 gnd 2 vaa 1 com 10 dt 9 ocset 8 in- 3 comp 4 csd 5 vss 6 vre f 7 vb 15 csh 16 u1 irs 2092s c1 1nf c30 10nf ch1 output +75v bus +5v -5v audio gnd 1 -75v bus gnd2 sd vcc ch1 o +b -b c3 10uf 22uf c5 c12 3.3uf IRAUDAMP9-1.7-kw single channel daughter board 7 8 9 10 11 12 j1-b a26568-nd drawn by: israel serrano r46 3.01k p1 1k sch_amp9_db_2092_buf-to220-rev 1.0 -b +75v bus -75v bus q6a irfb4227 q5a irfb4227 q6b irfb4227 q5b irfb4227 q8 zxtp25100bfh q2 zxtp25100bfh q9 zxtn25100bfh q3 zxtn25100bfh vb ds1 -b r21a 4.7r r20a 10k r21b 4.7r r20b 10k r23a 4.7r r23b 4.7r r22a 10k r22b 10k r44 0r r45 0r 1 2 3 4 5 6 j1-a a26568-nd d7 c34 0.47 uf 250v c33 0.47 uf 250v heatsink rp1 0 r q6c irfb4227 q5c irfb4227 r21c 4.7r r20c 10k r23c 4.7r r22c 10k vaa in-1 irs2092s -to220 buffered module schematic diagram ocset 1 2 3 4 16 15 14 13 5 6 7 8 12 11 10 9 j2-a a26578-nd 1 2 3 4 16 15 14 13 5 6 7 8 12 11 10 9 j2-b a26578-nd to lpf c100 0.1uf q100 zxtn25100bfh vss sd r102 10k otp1 r101 4.7k r103 715r r104 4.7k q101 zxtp25100bfh vss th1 th2 .2k c36 1 nf c37 1 nf r105 10k vss c32 2.2uf c31 2.2uf r37 10r r36 10r optional- (un s t u ff fo r 1kw-amp9) figure 24 IRAUDAMP9 schematic diagram for daughter board
www.irf.com IRAUDAMP9 rev 1.0 page 30 of 39 IRAUDAMP9 fabrication bill of materials (bom) table 1 IRAUDAMP9 mother board?s bom item pn designator qty 'description vendor 1 565-1106-nd c1, c33, c75, c77 4 cap 10uf 50v elect smg rad digikey 2 pcc13491ct-nd c2, c82, c83 3 cap 10uf 16v ceramic x7r 1206 digikey 3 565-1147-nd c3, c6, c23, c84, c85, c86 6 cap 4.7uf 100v elect smg rad digikey 4 490-1857-1-nd c4, c7, c24 3 cap cer 1.0uf 100v 10% x7r 1210 digikey 5 490-1644-1-nd c9, c11, c25 3 cap cer 22000pf 50v 5% c0g 0805 digikey 6 478-1403-1-nd c10, c13, c26 3 cap cerm .47uf 10% 16v x7r 0805 digikey 7 490-1864-1-nd c12, c16, c27 3 cap cer 4.7uf 50v 10% x7r 1210 digikey 8 445-2685-1-nd c14, c19, c28 3 cap cer 8200pf 50v c0g 5% 0805 digikey 9 pcc1982ct-nd c15, c20, c29 3 c ap 330pf 100v ceramic x7r 0805 digikey 10 478-3772-1-nd c17, c21, c30 3 cap cerm 6800pf 5% 50v x7r 0805 digikey 11 478-3746-1-nd c18, c22, c31 3 cap cerm 2200pf 5% 100v x7r 0805 digikey 12 445-2378-1-nd c32 1 cap cer 150pf 3000v c0g 10% 1812 digikey 13 399-5432-nd c34 1 cap film pp 2.2uf 275/280vac x2 digikey 14 pce3101ct-nd c35, c64, c65, c69, c79 5 cap 10uf 16v elect fc smd digikey 15 pcc1931ct-nd c39 1 cap 2.2uf 16v ceramic x7r 1206 digikey 16 478-1281-1-nd c40 1 cap cerm 33pf 5% 100v np0 0805 digikey 17 565-1161-nd c45, c46, c47, c48 4 cap 1200uf 100v elect smg rad digikey 18 pcc1812ct-nd c62, c63, c68, c78 4 cap .1uf 16v ceramic x7r 0805 digikey 19 565-1037-nd c66 1 cap 100uf 16v elect smg rad digikey 20 445-1418-1-nd c67 1 cap cer .10uf 100v x7r 10% 0805 digikey 21 pcc101cgct-nd c70 1 cap 100pf 50v cerm chip 0805 smd digikey 22 493-1042-nd c71 1 cap 330uf 16v elect vr radial digikey 23 445-2322-1-nd c72 1 cap cer 2200pf 100v c0g 5% 0805 digikey 24 pcc103bnct-nd c80 1 cap 10000pf 50v cerm chip 0805 digikey 25 b180dict-nd d1, d2, d4 3 diode schottky 80v 1a sma digikey 26 b1100-fdict-nd d3 1 diode schottky 100v 1a sma digikey 27 d5a 1 bav19ws-7-f 28 1n4148wdict-nd, 1n4148wtpmsct-nd d8, d19, d20, d21 4 diode switch 75v 400mw sod-123, 150ma digikey 29 1n5819hw-fdict-nd d11 1 diode schottky 40v 1a sod123 digikey 30 rs1db-fdict-nd d23 1 diode fast rec 200v 1a smb digikey 31 277-1271-nd j1 1 conn term block 2pos 9.52mm pcb digikey 32 a26453-nd j2 1 conn recept 6pos .100 vert dual digikey 33 277-1272-nd j3 1 conn term block 3pos 9.52mm pcb digikey 34 a26454-nd j4 1 conn recept 8pos .100 vert dual digikey 35 a32248-nd j6 1 conn jack bnc r/a 50 ohm pcb tin digikey 36 cp-1418-nd j7 1 conn rca jack r/a black pcb digikey 37 ed1567-nd j8 1 terminal block 7.50mm vert 2pos digikey
www.irf.com IRAUDAMP9 rev 1.0 page 31 of 39 38 a26453-nd j10 1 conn recept 6pos .100 vert dual digikey 39 513-1051-1-nd l1, l2, l3 3 inductor shield pwr 470uh smd digikey 40 7g31a-220m-r l4 1 22uh ferrite inductor sagami 7g31z - r sagami inductors, inc 41 160-1143-nd led for normal1 (green) 1 led 3mm green transparent digikey 42 160-1140-nd protection1 (red) 1 led 3mm hi-eff red transparent digikey 43 fzt855ta q1, q3 2 trans npn 150v 4000ma sot-223 digikey 44 mmbta92dict-nd q2 1 transistor pnp -300v sot-23 digikey 45 mmbt5401dict-nd q10, q13 2 trans 150v 350mw pnp smd sot- 23 digikey 46 mmbt5551-7dict-nd q8, q9, q9a, q12, q14 5 trans 160v 350mw npn smd sot- 23 digikey 47 pzt2222act-nd q18 1 trans amp npn gp 40v .5a sot-223 digikey 48 pzt2907at1gosct-nd q20 1 trans ss sw pnp 600ma 60v sot223 digikey 49 pt10xct-nd r1, r4 2 res 10 ohm 1w 5% 2512 smd digikey 50 p10kact-nd r2, r3, r5, r7, r84, r92, r99 7 res 10k ohm 1/8w 5% 0805 smd digikey 51 p20kact-nd r6, r142 2 res 20k ohm 1/8w 5% 0805 smd digikey 52 p47act-nd r8, r12, r29, r56, r82, r88, r101, r107, r133, r134, r135 11 res 47 ohm 1/8w 5% 0805 smd digikey 53 pt10xct-nd r9, r14, r30 3 res 10 ohm 1w 5% 2512 smd digikey 54 rhm10.0kcrct-nd r10 1 res 10k ohm 1/8w 1% 0805 smd digikey 55 p18.7kcct-nd r11, r17, r32 3 res 18.7k ohm 1/8w 1% 0805 smd digikey 56 p1.00kcct-nd r13 1 res 1.00k ohm 1/8w 1% 0805 smd digikey 57 p4.7kcct-nd r15, r31 2 res 4.70k ohm 1/8w 1% 0805 smd digikey 58 p20.5kcct-nd r16, r19, r37 3 res 20.5k ohm 1/8w 1% 0805 smd digikey 59 p1.00kcct-nd r18, r36 2 res 1.00k ohm 1/8w 1% 0805 smd digikey 60 ppc100kw-3jct-nd r38 1 res 100k ohm metal film 3w 5% digikey 61 p1.0kect-nd r39 1 res 1.0k ohm 1/4w 5% 1206 smd digikey 62 p3.3kzct-nd r40 1 res 3.3k ohm 1/10w .1% 0805 smd digikey 63 p22kact-nd r41 1 res 22k ohm 1/8w 5% 0805 smd digikey 64 pt2.2kxct-nd r43 1 res 2.2k ohm 1w 5% 2512 smd digikey 65 pt10xct-nd r45a 1 res 10 ohm 1w 5% 2512 smd digikey 66 311-470arct-nd r46 1 res 470 ohm 1/8w 5% 0805 smd digikey 67 311-1.0karct-nd, p1.0kact-nd r51, r104, r106, r121, r154 5 res 1.0k ohm 1/8w 5% 0805 smd digikey 68 p200kact-nd r58, r59 2 res 200k ohm 1/8w 5% 0805 smd digikey 69 p100ect-nd r80, r90, r94 3 res 100 ohm 1/4w 5% 1206 smd digikey 70 p33kact-nd r81 1 res 33k ohm 1/8w 5% 0805 smd digikey 71 p47kact-nd r86, r95, r96, r105, r111, r123, r129, 7 res 47k ohm 1/8w 5% 0805 smd digikey 72 p68kact-nd r85, r97 2 res 68k ohm 1/8w 5% 0805 smd digikey 73 p100kact-nd r87, r91, r108, r109, r112, r116, r117, r118, r119, r132 10 res 100k ohm 1/8w 5% 0805 smd digikey
www.irf.com IRAUDAMP9 rev 1.0 page 32 of 39 74 p4.7kact-nd r89 1 res 4.7k ohm 1/8w 5% 0805 smd digikey 75 p100act-nd r98, r114, r131 3 res 100 ohm 1/8w 5% 0805 smd digikey 76 3362h-502lf-nd r100 1 pot 5.0k ohm 1/4" sq cerm sl st digikey 77 p330act-nd r102 1 res 330 ohm 1/8w 5% 0805 smd digikey 78 p82kact-nd r103 1 res 82k ohm 1/8w 5% 0805 smd digikey 79 p5.76kfct-nd r110, r113, r120, r124, r126, r127 6 res 5.76k ohm 1/4w 1% 1206 smd digikey 80 p10ect-nd r115 1 res 10 ohm 1/4w 5% 1206 smd digikey 81 p0.0act-nd, p0.0ect- nd r122, r128, r153 3 res zero ohm 1/4w 5% 1206 smd digikey 82 p3g7103-nd r130 1 pot 10k ohm 9mm vert met bushing digikey 83 rmcf1/100rct-nd r141, r148, r151 3 res 0.0 ohm 1/8w 0805 smd digikey 84 p47.5kcct-nd r144, r145, r146 3 res 47.5k ohm 1/8w 1% 0805 smd digikey 85 pt10xct-nd r147, r149, 2 res 10 ohm 1w 5% 2512 smd digikey 86 pt4.7xct-nd r150 1 res 4.7 ohm 1w 5% 2512 smd digikey 87 p0.0ect-nd r152 1 res zero ohm 1/4w 5% 1206 smd digikey 88 eg1944-nd s1, s2 2 switch slide dp3t .2a l=6mm digikey 89 p8010s-nd s3 1 6mm light touch sw h=5 digikey 90 lm5574mt-nd u2, u3, u4 3 ic reg buck 75v 0.5a 16-tssop digikey 91 296-1089-1-nd u8 1 ic single inverter gate sot23-5 digikey 92 296-11643-1-nd u13 1 dual 4-bit binary counters digikey 93 300-8001-1-nd u14 1 oscillator 1.5440 mhz smt digikey 94 296-1194-1-nd u_1 1 ic hex schmitt-trig inv 14-soic digikey 95 3310ir02 u_2 1 tachyonix 96 598-1599-nd u_3 1 amplifiers - audio stereo digital volume control digikey / mouser 97 bzt52c15-7dict-nd z1 1 diode zener 15v 500mw sod-123 digikey 98 mmsz5263bt1osct- nd z2, z3 2 diode zener 500mw 56v sod123 digikey 99 bzt52c5v1-7dict-nd z4 1 diode zener 5.1v 500mw sod-123 digikey 100 bzt52c18-fdict-nd z7 1 diode zener 500mw 18v sod123 digikey 101 bzt52c36-7dict-nd z8 1 diode zener 36v 500mw sod-123 digikey 102 mmsz5268bt1gosct- nd z9 1 diode zener 82v 500mw sod-123 digikey 103 bzt52c5v6-fdict-nd z10, z12 2 diode zener 5.6v 500mw sod123 digikey 104 bzt52c5v6-fdict-nd z10, z13 3 diode zener 5.6v 500mw sod124 digikey 105 bzt52c5v6-fdict-nd z10, z14 4 diode zener 5.6v 500mw sod125 digikey
www.irf.com IRAUDAMP9 rev 1.0 page 33 of 39 table 2 IRAUDAMP9 daughter board?s bill of materials item digikey / mouser pn designator description qty 1 445-2325-1-nd c1, c21, c23 cap cer 1000pf 250v c0g 5% 0805 3 2 490-1867-1-nd c3 cap cer 10uf 25v 10% x7r 1210 1 3 t491a226k025at c5 cap tantalum 22uf 25v 10% smd 1 4 490-1867-1-nd c10 cap cer 10uf 25v 10% x7r 1210 1 5 445-1432-1-nd c12, c18 cap cer 3.3uf 50v x7r 20% 1210 2 6 pcc103bnct-nd c30 cap 10000pf 50v cerm chip 0805 1 7 490-1867-1-nd c31, c32 cap cer 10uf 25v x7r 10% 1210 2 8 478-3988-1-nd c33, c34 cap cer 0.47uf 250v x7r 1812 2 9 399-4678-1-nd c35 cap cer 0.1uf 250v x7r 1206 1 10 478-5552-1-nd c36, c37 cap cer 1000pf 250v x7r 1206 2 11 445-2686-1-nd c100 cap cer 0.1uf 10v sl 5% 0805 1 12 bav19ws-fdict-nd d1 diode switch 100v 200mw sod323 1 13 1n4148ws-fdict-nd d4 diode switch 75v 200mw sod323 1 14 mura120t3gosct-nd d6 diode ultra fast 1a 200v sma 1 15 es1dfsct-nd d7 diode ultrafast 200v 1a do- 214ac 1 16 160-1645-1-nd ds1 led 468nm blue clear 0805 smd 1 17 a26568-nd j1-a, j1-b conn header vert 6pos .100 30au 2 18 a26578-nd j2-a, j2-b conn header vert .100 16pos 30au 2 19 st32etb102ct-nd p1 pot 1.0k ohm 3mm cerm sq top smd 1 20 zxtp25100bfhct-nd q2, q8, q101 transistor pnp 100v 2a sot23-3 3 21 zxtn25100bfhct-nd q3, q9, q100 transistor npn 100v 3a sot23- 3 22 irfb4227pbf q5a, q5c, q6a, q6c 200v 65a n-channel mosfet to 220 4 23 p100act-nd r1 res 100 ohm 1/8w 5% 0805 smd 1 24 p10act-nd r3 res 10 ohm 1/8w 5% 0805 smd 1 25 p3.3kact-nd r5 res 3.3k ohm 1/8w 5% 0805 smd 1 26 p10ect-nd r7 res 10 ohm 1/4w 5% 1206 smd 1 27 p10act-nd r9 res 10 ohm 1/8w 5% 0805 smd 1 28 p4.7kact-nd r12 res 4.7k ohm 1/8w 5% 0805 smd 1 29 p8.2kact-nd r13 res 8.2k ohm 1/8w 5% 0805 smd 1 30 p2.2kact-nd r17 res 2.2k ohm 1/8w 5% 0805 smd 1 31 p8.2kact-nd r19 res 8.2k ohm 1/8w 5% 0805 smd 1 32 p10kact-nd r20a, r20b, r20c, r22a, r22b, r22c, r25 res 10k ohm 1/8w 5% 0805 smd 7 33 rhm470crct-nd r21 res 470 ohm 1/8w 1% 0805 smd 1 34 p4.7act-nd r21a, r21b, r21c, r23a, r23b, r23c, r26 resistor 4.7 ohm 1/8w 5% 0805 7
www.irf.com IRAUDAMP9 rev 1.0 page 34 of 39 35 p0.0act-nd r30, r32, r44, r45 res 0.0 ohm 1/8w 0805 smd 4 36 p1.0act-nd r35 resistor 1.0 ohm 1/8w 5% 0805 1 37 pt10xct-nd r36, r37 res 10 ohm 1w 5% 2512 smd 2 38 rhm33karct-nd r40 res 33k ohm 1/8w 5% 0805 smd 1 39 p10kact-nd r41 res 10k ohm 1/8w 5% 0805 smd 1 40 p3.6kact-nd r43 res 3.6k ohm 1/8w 5% 0805 smd 1 41 rhm3.01kcct-nd r46 res 3.01k ohm 1/8w 1% 0805 smd 1 42 rt1206fre0775kl-nd r50, r52 res 75.0k ohm 1/8w 1% smd 1206 2 43 rhm4.7karct-nd r101, r104 res 4.7k ohm 1/8w 5% 0805 smd 2 44 rhm10karct-nd r102, r105 res 10k ohm 1/8w 5% 0805 smd 2 45 rt1206fre07715rl-nd r103 res 715 ohm 1/8w .5% smd 1206 1 46 rt0805fre07470rl-nd rp1 res 470 ohm 1/8w 1% 0805 smd 1 47 bc2304-nd th1 thermistor ntc 2.2k ohm leaded 1 48 irs2092s u1 high and low side driver 1 table 3 IRAUDAMP9 mechani cal bill of materials no p/n description quantity vendor 1 7-342-2pp-ba to220 heatsink 15w htsnk assy 1 2 digi-key 2 silpad insulator pad 4 3 lock washer 4 4 mounting screws / nuts 4 sets 5 plastic to220-bushing 4 6 standoff 6 7 amp9 pcb mb IRAUDAMP9 main board 1 8 amp9 pcb db IRAUDAMP9 daughter board 1
www.irf.com IRAUDAMP9 rev 1.0 page 35 of 39 IRAUDAMP9 pcb specifications: 1. two layers smt pcb with through holes 2. 1/16 thickness 3. 2/0 oz cu 4. fr4 material 5. 10 mil lines and spaces 6. solder mask to be green enamel emp110 dbg (carapace) or enthone endplate dsr- 3241or equivalent. 7. silk screen to be white epoxy non conductive per ipc?rb 276 standard. 8. all exposed copper must finished with tin-lead sn 60 or 63 for 100u inches thick. 9. tolerance of pcb size shall be 0.010 ?0.000 inches 10. tolerance of all holes is -.000 + 0.003? 11. pcb acceptance criteria as defined for class ii pcb?s standards. gerber files apertures description: all gerber files stored in the attached cd-rom were generated from protel altium designer altium designer 6. 1. .gtl top copper, top side 2. .gbl bottom copper, bottom side 3. .gto top silk screen 4. .gbo bottom silk screen 5. .gts top solder mask 6. .gbs bottom solder mask 7. .gko keep out, 8. .gm1 mechanical1 9. .gd1 drill drawing 10. .gg1 drill locations 11. .txt cnc data 12. .apr apertures data additional files for assembly that may not be related with gerber files: 13. .pcb pcb file 14. .bom bill of materials 15. .cpl components locations 16. .sch schematic 17. .csv pick and place components 18. .net net list 19. .bak back up files 20. .lib pcb libraries
www.irf.com IRAUDAMP9 rev 1.0 page 36 of 39 figure 25 IRAUDAMP9 mother bo ard pcb top overlay (top view)
www.irf.com IRAUDAMP9 rev 1.0 page 37 of 39 figure 26 IRAUDAMP9 mother boa rd pcb bottom layer (top view)
www.irf.com IRAUDAMP9 rev 1.0 page 38 of 39 figure 27 IRAUDAMP9 daughter boa rd pcb top overlay (top view) figure 28 IRAUDAMP9 daughter board pcb bottom layer (top view)
www.irf.com IRAUDAMP9 rev 1.0 page 39 of 39 revision changes descriptions revision changes description date rev d2 release for pre-production. aug, 18 2011 rev e3 release for pre-production. mar. 18, 2011 rev 1.0 release for production. mar. 25, 2011 world headquarters: 233 kansas st., el segundo, califor nia 90245 te l: (310) 252-7105 data and specifications subject to change without notice. 03/25/2011

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